1. Field of the Invention
The present invention relates to a method of processing a substrate on which a coating film is formed and a processing apparatus for the same.
2. Description of the Related Art
In a manufacturing process of a semiconductor device using a photolithography technology, for example, a treatment of forming an insulating film and a treatment of forming a resist film are performed. These treatments are typically performed by applying a coating solution composed of a film material in a liquid form onto a substrate and then evaporating a solvent in the coating film to dry the coating film.
In the manufacturing step of the semiconductor device having a complicated multilayer wiring structure, the coating solution is applied on a base film formed with a pattern and thus having irregularities. In this case, for example, the coating solution flows into portions of the base film with grooves on the wafer (substrate) W so that the film thickness of the portions with grooves is small, resulting in irregularities formed on the upper surface of the coating solution R as shown in FIG. 10. Further, in the case where the coating solution is applied to the substrate which is being rotated, for example, for an SOG film and an SOD film, the portion of the film near the periphery of the substrate affected by a stronger centrifugal force rises higher than the portion of the film near the central portion of the substrate. When the coating film R is dried, the coating film R shrinks due to evaporation of a solvent therein. The shrinkage percentage of the coating film R is different on the base film between the portion with the grooves and the portion without grooves, which difference also forms irregularities on the upper surface of the coating film R.
Formation of the irregularities on the upper surface of the coating film as described above causes, for example, partial defocusing at the time of exposure, leading to variations in line width of the pattern to be formed on the coating film. Further, at the time of etching, the depth of the groove formed by the etching is, different between the rising portion and the recessed portion on the upper surface of the coating film, with the result that metal wires embedded in the grooves have nonuniform depths to cause uneven electric resistances, failing to form an appropriate semiconductor device.
To planarize the coating film, for example, for an insulating film, processing is performed in which the surface of the coating film is polished by the CMP (Chemical Mechanical Polishing) technique after the formation of the film. However, in this case, a lot of time is required for the CMP processing, resulting in decreased throughput. Further, a CMP device is also necessary, which accordingly increases the cost.
Other than the aforementioned CMP technique, other planarization methods have been proposed, such as a planarization technique of planarizing the coating film by a roller (Japanese Patent Application Laid-open No. 2000-31138), a planarization technique of laying a thin film on the coating film and pressurizing the thin film (Japanese Patent Application Laid-open No. H 9-27495), and so on, but any of them has not attained a sufficient flatness.